# Formal Verification Engineer - Company: [Voltai Careers]() - Location: Palo Alto Office - Team: Chips & Silicon - Employment type: Full Time - Posted: November 12, 2025 ## Job description **About Voltai** Voltai is developing world models, and agents to learn, evaluate, plan, experiment, and interact with the physical world. We are starting out with understanding and building hardware; electronics systems and semiconductors where AI can design and create beyond human cognitive limits. **About the Team** Backed by Silicon Valley’s top investors, Stanford University, and CEOs/Presidents of Google, AMD, Broadcom, Marvell, etc. We are a team of previous Stanford professors, SAIL researchers, Olympiad medalists (IPhO, IOI, etc.), CTOs of Synopsys & GlobalFoundries, Head of Sales & CRO of Cadence, former US Secretary of Defense, National Security Advisor, and Senior Foreign-Policy Advisor to four US presidents. **About this Role** In this role, you’ll build **formal proofs of design correctness** using model checking, property verification, and equivalence analysis. You’ll collaborate closely with RTL, verification, and ML research teams to develop hybrid formal engines that reason about AI-generated hardware at scale. You’ll define formal properties, automate assertion synthesis, and build systems that verify at the speed of thought. **You might thrive if you have 5+ years of experience in** * **JasperGold**, **VC Formal**, or similar formal verification tools * **Assertion-based verification (SVA)** * **Model checking** and **property decomposition** * **Equivalence checking**, **abstraction refinement**, and **formal coverage** ## Apply [Apply on Voltai Careers]() Canonical job page: